Sciweavers

7 search results - page 1 / 2
» Online design bug detection: RTL analysis, flexible mechanis...
Sort
View
MICRO
2008
IEEE
92views Hardware» more  MICRO 2008»
13 years 11 months ago
Online design bug detection: RTL analysis, flexible mechanisms, and evaluation
Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of res...
Kypros Constantinides, Onur Mutlu, Todd M. Austin
PPOPP
2011
ACM
12 years 7 months ago
GRace: a low-overhead mechanism for detecting data races in GPU programs
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. Many application developers, including those with no prior parallel program...
Mai Zheng, Vignesh T. Ravi, Feng Qin, Gagan Agrawa...
EMSOFT
2007
Springer
13 years 11 months ago
A dynamic scheduling approach to designing flexible safety-critical systems
The design of safety-critical systems has typically adopted static techniques to simplify error detection and fault tolerance. However, economic pressure to reduce costs is exposi...
Luís Almeida, Sebastian Fischmeister, Madhu...
ASPLOS
2010
ACM
13 years 11 months ago
Virtualized and flexible ECC for main memory
We present a general scheme for virtualizing main memory errorcorrection mechanisms, which map redundant information needed to correct errors into the memory namespace itself. We ...
Doe Hyun Yoon, Mattan Erez
TCAD
2008
101views more  TCAD 2008»
13 years 4 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin