8 search results - page 1 / 2 » Optimal Clock Period FPGA Technology Mapping for Sequential ... |
DAC
1996
ACM
13 years 9 months ago
1996
ACM
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
DAC
1999
ACM
14 years 5 months ago
1999
ACM
Partitioning and clustering are crucial steps in circuit layout for handling large scale designs enabled by the deep submicron technologies. Retiming is an important sequential lo...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...