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FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
13 years 9 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
13 years 10 months ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...
TVLSI
2010
12 years 12 months ago
A Low-Power DSP for Wireless Communications
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...
PLDI
2005
ACM
13 years 10 months ago
Code placement for improving dynamic branch prediction accuracy
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
Daniel A. Jiménez
CGO
2003
IEEE
13 years 10 months ago
Dynamic Binary Translation for Accumulator-Oriented Architectures
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
Ho-Seop Kim, James E. Smith