3 search results - page 1 / 1 » Optimal sizing of high-speed clock networks based on distrib... |
ICCAD
1993
IEEE
13 years 9 months ago
1993
IEEE
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
TCAD
1998
13 years 4 months ago
1998
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...