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DAC
2006
ACM
14 years 6 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
ICWS
2008
IEEE
13 years 6 months ago
High-Performance XML Parsing and Validation with Permutation Phrase Grammar Parsers
The extensibility, flexibility, expressiveness, and platform-neutrality of XML delivers key advantages for interoperability. The interoperability of XML Web services often comes a...
Wei Zhang, Robert A. van Engelen
ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
13 years 11 months ago
Mechanisms for bounding vulnerabilities of processor structures
Concern for the increasing susceptibility of processor structures to transient errors has led to several recent research efforts that propose architectural techniques to enhance r...
Niranjan Soundararajan, Angshuman Parashar, Anand ...
ICML
2004
IEEE
14 years 6 months ago
Generative modeling for continuous non-linearly embedded visual inference
Many difficult visual perception problems, like 3D human motion estimation, can be formulated in terms of inference using complex generative models, defined over high-dimensional ...
Cristian Sminchisescu, Allan D. Jepson
ESTIMEDIA
2007
Springer
13 years 11 months ago
Run-time Task Overlapping on Multiprocessor Platforms
Today’s embedded applications often consist of multiple concurrent tasks. These tasks are decomposed into subtasks which are in turn assigned and scheduled on multiple different...
Zhe Ma, Daniele Paolo Scarpazza, Francky Catthoor