8 search results - page 1 / 2 » Optimizing Data Scheduling on Processor-in-Memory Arrays |
IPPS
1998
IEEE
13 years 9 months ago
1998
IEEE
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
MICRO
2000
IEEE
13 years 4 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
APPT
2005
Springer
13 years 10 months ago
2005
Springer
Abstract. The data redistribution problems on multi-computers had been extensively studied. Irregular data redistribution has been paid attention recently since it can distribute d...
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
This paper presents a novel technique to perform global optimization of communication and preprocessing calls in the presence of array accesses with arbitrary subscripts. Our sche...