Sciweavers

12 search results - page 1 / 3
» Optimizing FPGA-Based Vector Product Designs
Sort
View
FCCM
1999
IEEE
111views VLSI» more  FCCM 1999»
13 years 9 months ago
Optimizing FPGA-Based Vector Product Designs
This paper presents a method, called multiple constant multiplier trees MCMTs, for producing optimized recon gurable hardware implementations of vector products. An algorithm for ...
Dan Benyamin, John D. Villasenor, Wayne Luk
ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
13 years 11 months ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
SIGIR
2002
ACM
13 years 4 months ago
Automatic classification in product catalogs
In this paper, we present the AutoCat system for product classification. AutoCat uses a vector space model, modified to consider product attributes unavailable in traditional docu...
Ben Wolin
GECCO
2005
Springer
195views Optimization» more  GECCO 2005»
13 years 10 months ago
Evolutionary strategies for multi-scale radial basis function kernels in support vector machines
In support vector machines (SVM), the kernel functions which compute dot product in feature space significantly affect the performance of classifiers. Each kernel function is suit...
Tanasanee Phienthrakul, Boonserm Kijsirikul
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 5 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana