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ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
13 years 9 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
CF
2006
ACM
13 years 8 months ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao
SDM
2010
SIAM
204views Data Mining» more  SDM 2010»
13 years 6 months ago
Scalable Tensor Factorizations with Missing Data
The problem of missing data is ubiquitous in domains such as biomedical signal processing, network traffic analysis, bibliometrics, social network analysis, chemometrics, computer...
Evrim Acar, Daniel M. Dunlavy, Tamara G. Kolda, Mo...