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» Optimizing Technology Mapping for FPGAs Using CAMs
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FCCM
2005
IEEE
90views VLSI» more  FCCM 2005»
13 years 10 months ago
Optimizing Technology Mapping for FPGAs Using CAMs
Joshua M. Lucas, Raymond Hoare, Alex K. Jones
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
13 years 9 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
FPGA
2000
ACM
109views FPGA» more  FPGA 2000»
13 years 8 months ago
Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays
It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown tha...
Steven J. E. Wilton
ASPDAC
2004
ACM
113views Hardware» more  ASPDAC 2004»
13 years 8 months ago
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
Chi-Chou Kao, Yen-Tai Lai
FPGA
2000
ACM
125views FPGA» more  FPGA 2000»
13 years 8 months ago
Technology mapping for k/m-macrocell based FPGAs
In this paper, we study the technology mapping problem for a novel FPGA architecture that is based on k-input single-output PLA-like cells, or, k/m-macrocells. Each cell in this a...
Jason Cong, Hui Huang, Xin Yuan