50 search results - page 4 / 10 » Optimizing dominant time constant in RC circuits |
DAGSTUHL
2007
13 years 6 months ago
2007
In this paper, we prove that the quadratic polynomials modulo 3 with the largest correlation with parity are unique up to permutation of variables and constant factors. As a conseq...
ISLPED
1999
ACM
13 years 9 months ago
1999
ACM
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
SBCCI
2005
ACM
13 years 11 months ago
2005
ACM
Gate oxide tunneling current Igate and sub-threshold current Isub dominate the leakage of designs. The latter depends on threshold voltage Vth while Igate vary with the thickness ...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
DAC
2010
ACM
13 years 9 months ago
2010
ACM
Reversible logic became a promising alternative to traditional circuits because of its applications e.g. in low-power design and quantum computation. As a result, design of revers...