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FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
13 years 9 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
AINA
2009
IEEE
14 years 1 days ago
Reliability-Driven Reputation Based Scheduling for Public-Resource Computing Using GA
— For an application in public-resource computing environments, providing reliable scheduling based on resource reliability evaluation is becoming increasingly important. Most ex...
Xiaofeng Wang, Chee Shin Yeo, Rajkumar Buyya, Jins...
CCGRID
2009
IEEE
14 years 1 hour ago
Reliability-Oriented Genetic Algorithm for Workflow Applications Using Max-Min Strategy
— To optimize makespan and reliability for workflow applications, most existing works use list heuristics rather than genetic algorithms (GAs) which can usually give better solut...
Xiaofeng Wang, Rajkumar Buyya, Jinshu Su
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
13 years 11 months ago
Optimal periodic testing of intermittent faults in embedded pipelined processor applications
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
Nektarios Kranitis, Andreas Merentitis, N. Laoutar...
DAC
2005
ACM
14 years 6 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...