Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...
Hardware transactional memory is a promising synchronization technology for chip-multiprocessors. It simplifies programming of concurrent applications and allows for higher concu...
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
In this paper, we identify transaction-local memory as a major source of overhead from compiler instrumentation in software transactional memory (STM). Transaction-local memory is...
Aleksandar Dragojevic, Yang Ni, Ali-Reza Adl-Tabat...