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» Overview on Low Power SoC Design Technology
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CODES
2003
IEEE
13 years 10 months ago
Security wrappers and power analysis for SoC technologies
Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resi...
Catherine H. Gebotys, Y. Zhang
CSE
2009
IEEE
13 years 8 months ago
Rotation Scheduling and Voltage Assignment to Minimize Energy for SoC
— Low energy consumption is a critical issue in embedded systems design. As the technology feature sizes of SoC (Systems on Chip) become smaller and smaller, the percentage of le...
Meikang Qiu, Laurence Tianruo Yang, Edwin Hsing-Me...
IPPS
2006
IEEE
13 years 11 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
CODES
2006
IEEE
13 years 11 months ago
Floorplan driven leakage power aware IP-based SoC design space exploration
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...