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» PLCStudio: Simulation based PLC code verification
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CODES
2009
IEEE
13 years 9 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
IFIP
2001
Springer
13 years 9 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
EUROMICRO
1999
IEEE
13 years 9 months ago
Software Synthesis for System Level Design Using Process Execution Trees
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...
Leo J. van Bokhoven, Jeroen Voeten, Marc Geilen
TWC
2008
122views more  TWC 2008»
13 years 5 months ago
TSVC: timed efficient and secure vehicular communications with privacy preserving
In this paper, we propose a Timed Efficient and Secure Vehicular Communication (TSVC) scheme with privacy preservation, which aims at minimizing the packet overhead in terms of sig...
Xiaodong Lin, Xiaoting Sun, Xiaoyu Wang, Chenxi Zh...
ICS
2005
Tsinghua U.
13 years 10 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John