Sciweavers

15 search results - page 2 / 3
» POSE: Power Optimization and Synthesis Environment
Sort
View
ICCAD
1995
IEEE
144views Hardware» more  ICCAD 1995»
13 years 9 months ago
Background memory management for dynamic data structure intensive processing systems
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wu...
FDL
2005
IEEE
13 years 11 months ago
Automatic synthesis of the Hardware/Software Interface
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...
Francesco Regazzoni, André C. Nácul,...
ECCV
2010
Springer
13 years 6 months ago
Robust and Fast Collaborative Tracking with Two Stage Sparse Optimization
Abstract. The sparse representation has been widely used in many areas and utilized for visual tracking. Tracking with sparse representation is formulated as searching for samples ...
Baiyang Liu, Lin Yang, Junzhou Huang, Peter Meer, ...
ICCAD
2007
IEEE
153views Hardware» more  ICCAD 2007»
14 years 2 months ago
Checking equivalence of quantum circuits and states
Among the post-CMOS technologies currently under investigation, quantum computing (QC) holds a special place. QC offers not only extremely small size and low power, but also expon...
George F. Viamontes, Igor L. Markov, John P. Hayes
IISWC
2006
IEEE
13 years 11 months ago
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks
Many embedded real world applications are intellectual property, and vendors hesitate to share these proprietary applications with computer architects and designers. This poses a ...
Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., L...