10 search results - page 1 / 2 » Parallel Architecture for 2-D Discrete Wavelet Transform wit... |
IEICET
2008
13 years 5 months ago
2008
TSP
2008
13 years 5 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
ICPP
1996
IEEE
13 years 9 months ago
1996
IEEE
: We study the scalability of 2-D discrete wavelet transform algorithms on fine-grained parallel architectures. The principal operation in the 2-D DWT is the filtering operation us...
FPL
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...