156 search results - page 1 / 32 » Parallel SAT Solving using Bit-level Operations |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
We propose a normalization technique for verifying arithmetic circuits in a bounded model checking environment. Our technique operates on the arithmetic bit level (ABL) descriptio...
JSAT
2008
13 years 4 months ago
2008
We show how to exploit the 32/64 bit architecture of modern computers to accelerate some of the algorithms used in satisfiability solving by modifying assignments to variables in ...
ICPP
1993
IEEE
13 years 9 months ago
1993
IEEE
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
AIMSA
2008
Springer
13 years 11 months ago
2008
Springer
Abstract. Computational Grids provide a widely distributed computing environment suitable for randomized SAT solving. This paper develops techniques for incorporating learning, kno...