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» Parallel processing flow models on desktop hardware
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SAC
2010
ACM
13 years 7 months ago
Reactive parallel processing for synchronous dataflow
The control flow of common processors does not match the specific needs of reactive systems. Key issues for these systems are preemption and concurrency, combined with timing pred...
Claus Traulsen, Reinhard von Hanxleden
DATE
2009
IEEE
129views Hardware» more  DATE 2009»
14 years 8 days ago
An automated flow for integrating hardware IP into the automotive systems engineering process
This contribution shows and discusses the requirements and constraints that an industrial engineering process defines for the integration of hardware IP into the system developmen...
Jan-Hendrik Oetjens, Ralph Görgen, Joachim Ge...
IPPS
2007
IEEE
13 years 11 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
13 years 10 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
ARC
2010
Springer
138views Hardware» more  ARC 2010»
13 years 8 months ago
Space and Time Sharing of Reconfigurable Hardware for Accelerated Parallel Processing
High-Performance Reconfigurable Computers (HPRCs) are parallel machines consisting of FPGAs and microprocessors, with the FPGAs used as co-processors. The execution of parallel app...
Esam El-Araby, Vikram K. Narayana, Tarek A. El-Gha...