770 search results - page 2 / 154 » Parallel simulation of chip-multiprocessor architectures |
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
We explore the emerging application area of physics-based simulation for computer animation and visual special effects. In particular, we examine its parallelization potential and...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
Chip multiprocessors (CMPs) are now commonplace, and the number of cores on a CMP is likely to grow steadily. However, in order to harness the additional compute resources of a CM...
SIGARCH
2008
13 years 4 months ago
2008
- Bioinformatics applications such as gene and protein sequence matching algorithms are characterized by the need to process large amounts of data. While uni-processor performance ...
ICCD
1999
IEEE
13 years 9 months ago
1999
IEEE
