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» Parallelizing MPEG Video Encoding using Multiprocessors
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ICMCS
2008
IEEE
168views Multimedia» more  ICMCS 2008»
13 years 11 months ago
A co-design platform for algorithm/architecture design exploration
The efficient implementation of multimedia algorithms, for the ever increasing complexity of the specifications and the emergence of the new generation of processing platforms c...
Christophe Lucarz, Marco Mattavelli, Julien Dubois
APCSAC
2003
IEEE
13 years 9 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
13 years 10 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen
ICDCS
2009
IEEE
14 years 2 months ago
Pushing the Envelope: Extreme Network Coding on the GPU
While it is well known that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its high compu...
Hassan Shojania, Baochun Li
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 11 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...