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IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
13 years 11 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
APSEC
2004
IEEE
13 years 10 months ago
Modeling the Impact of a Learning Phase on the Business Value of a Pair Programming Project
Pair programmers need a "warmup phase" before the pair can work at full speed. The length of the learning interval varies, depending on how experienced the developers are...
Frank Padberg, Matthias M. Müller
DATE
2010
IEEE
155views Hardware» more  DATE 2010»
13 years 11 months ago
Scheduling and energy-distortion tradeoffs with operational refinement of image processing
— Ubiquitous image processing tasks (such as transform decompositions, filtering and motion estimation) do not currently provide graceful degradation when their clock-cycles budg...
Davide Anastasia, Yiannis Andreopoulos