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» Partial Error Masking to Reduce Soft Error Failure Rate in L...
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DATE
2006
IEEE
151views Hardware» more  DATE 2006»
13 years 11 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
DAC
2009
ACM
14 years 5 months ago
Improving testability and soft-error resilience through retiming
State elements are increasingly vulnerable to soft errors due to their decreasing size, and the fact that latched errors cannot be completely eliminated by electrical or timing ma...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
HPCA
2009
IEEE
14 years 5 months ago
Eliminating microarchitectural dependency from Architectural Vulnerability
The Architectural Vulnerability Factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microa...
Vilas Sridharan, David R. Kaeli
TDSC
2010
111views more  TDSC 2010»
13 years 3 months ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...