112 search results - page 1 / 23 » Path based buffer insertion |
DAC
2005
ACM
14 years 6 months ago
2005
ACM
ISPD
1999
ACM
13 years 9 months ago
1999
ACM
Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
ISPD
2003
ACM
13 years 10 months ago
2003
ACM
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
Abstract—Buffer resizing and buffer insertion are two transformation techniques for the performance optimization of elastic systems. Different approaches for each technique have ...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...