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ICCAD
2008
IEEE
129views Hardware» more  ICCAD 2008»
13 years 11 months ago
Path-RO: a novel on-chip critical path delay measurement under process variations
— As technology scales to 45nm and below, process variations will present significant impact on path delay. This trend makes the deviation between simulated path delay and actua...
Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Dat...
IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
13 years 10 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
ASPDAC
2012
ACM
290views Hardware» more  ASPDAC 2012»
12 years 12 days ago
CODA: A concurrent online delay measurement architecture for critical paths
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive desi...
Yubin Zhang, Haile Yu, Qiang Xu