This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
We consider the problem of built-in test generation for synchronous sequential circuits. The proposed scheme leaves the circuit flip-flops unmodified, and thus allows at-speed ...
It is a consensus in microarray analysis that identifying potential local patterns, characterized by coherent groups of genes and conditions, may shed light on the discovery of pre...
The ability to detect object size, location and movement is essential for a visual system in either a biological or man made environment. In this paper we present a model for esti...