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    ISLPED
    2005
    ACM
    111views Hardware» more  ISLPED 2005»
    Peak temperature control and leakage reduction during binding in high level synthesis
    13 years 10 months ago
    Peak temperature control and leakage reduction during binding in high level synthesis
    Download  www.eecs.northwestern.edu
    Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
    Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
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    DAC
    2008
    ACM
    162views Computer Architecture» more  DAC 2008»
    Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction
    13 years 6 months ago
    Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction
    Download  users.eecs.northwestern.edu
    Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
    Min Ni, Seda Ogrenci Memik
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