260 search results - page 2 / 52 » Performance Modelling and Optimization of Memory Access on C... |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
EUROPAR
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
CASES
2007
ACM
13 years 9 months ago
2007
ACM
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...