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CLUSTER
2001
IEEE
13 years 8 months ago
Parallel Standard Cell Placement on a Cluster of Workstations
In this paper we report experiences on a parallel implementation of a standard cell placement algorithm on a cluster of myrinet connected PCs. The proposed algorithm is based on a...
Faris H. Khundakjie, Patrick H. Madden, Nael B. Ab...
GECCO
2004
Springer
125views Optimization» more  GECCO 2004»
13 years 10 months ago
An Island-Based GA Implementation for VLSI Standard-Cell Placement
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
Guangfa Lu, Shawki Areibi
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
13 years 9 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
ARITH
1999
IEEE
13 years 9 months ago
Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...
Guenter Gerwig, Michael Kroener
ICCAD
2001
IEEE
108views Hardware» more  ICCAD 2001»
14 years 1 months ago
Placement Driven Retiming with a Coupled Edge Timing Model
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
Ingmar Neumann, Wolfgang Kunz