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» Performance evaluation of a java chip-multiprocessor
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LCTRTS
2010
Springer
13 years 3 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
HPCA
2006
IEEE
14 years 6 months ago
Dynamic power-performance adaptation of parallel computation on chip multiprocessors
Previous proposals for power-aware thread-level parallelism on chip multiprocessors (CMPs) mostly focus on multiprogrammed workloads. Nonetheless, parallel computation of a single...
Jian Li, José F. Martínez
MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
14 years 4 days ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...
IEEEPACT
2009
IEEE
14 years 12 days ago
Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
Abhishek Bhattacharjee, Margaret Martonosi
DAMON
2007
Springer
13 years 12 months ago
Parallel buffers for chip multiprocessors
Chip multiprocessors (CMPs) present new opportunities for improving database performance on large queries. Because CMPs often share execution, cache, or bandwidth resources among ...
John Cieslewicz, Kenneth A. Ross, Ioannis Giannaka...