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ICCD
1991
IEEE
111views Hardware» more  ICCD 1991»
13 years 8 months ago
Performance-Driven Global Routing for Cell Based ICs
Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid...
TCAD
2010
154views more  TCAD 2010»
12 years 11 months ago
Performance-Driven Dual-Rail Routing Architecture for Structured ASIC Design Style
In recent years, structured application-specific integrated circuit (ASIC) design style has lessened the importance of mask cost. Multiple structured ASIC chip designs share the sa...
Fu-Wei Chen, Yi-Yu Liu
ICCAD
2003
IEEE
147views Hardware» more  ICCAD 2003»
14 years 1 months ago
A Fast Crosstalk- and Performance-Driven Multilevel Routing System
In this paper, we propose a novel framework for fast multilevel routing considering crosstalk and performance optimization. To handle the crosstalk minimization problem, we incorp...
Tsung-Yi Ho, Yao-Wen Chang, Sao-Jie Chen, D. T. Le...
ASPDAC
1999
ACM
137views Hardware» more  ASPDAC 1999»
13 years 9 months ago
A Performance-Driven I/O Pin Routing Algorithm
This paper presents a performance-driven I/O pin routing algorithm with special consideration of wire uniformity. First, a topological routing based on min-cost max-flow algorith...
Dongsheng Wang, Ping Zhang, Chung-Kuan Cheng, Arun...
ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
13 years 8 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong