30 search results - page 3 / 6 » Pipelined Memory Shared Buffer for VLSI Switches |
NETWORK
2007
13 years 5 months ago
2007
— Two rate SLAs become increasingly popular in today’s Internet, allowing a customer to save money by paying one price for committed traffic and a much lower price for additio...
HIPEAC
2009
Springer
13 years 9 months ago
2009
Springer
Abstract. This paper advocates the placement of Architecturally Visible Communication (AVC) buffers between adjacent cores in MPSoCs to provide highthroughput communication for str...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
While clusters of commodity servers and switches are the most popular form of large-scale parallel computers, many programs are not easily parallelized for execution upon them. In...
ICCAD
1997
IEEE
13 years 10 months ago
1997
IEEE
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
SBCCI
2009
ACM
14 years 8 days ago
2009
ACM
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...