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» Pipelined hash-join on multithreaded architectures
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IPPS
2007
IEEE
14 years 2 days ago
A Prototype Multithreaded Associative SIMD Processor
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...
Kevin Schaffer, Robert A. Walker
HPCA
1998
IEEE
13 years 9 months ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
FPL
2009
Springer
135views Hardware» more  FPL 2009»
13 years 10 months ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
JUCS
2000
120views more  JUCS 2000»
13 years 5 months ago
Compiler Generated Multithreading to Alleviate Memory Latency
: Since the era of vector and pipelined computing, the computational speed is limited by the memory access time. Faster caches and more cache levels are used to bridge the growing ...
Kristof Beyls, Erik H. D'Hollander
APCSAC
2004
IEEE
13 years 9 months ago
Dynamic Fetch Engine for Simultaneous Multithreaded Processors
Abstract. While the fetch unit has been identified as one of the major bottlenecks of Simultaneous Multithreading architecture, several fetch schemes were proposed by prior works t...
Tzung-Rei Yang, Jong-Jiann Shieh