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SPAA
1997
ACM
13 years 9 months ago
Pipelining with Futures
Pipelining has been used in the design of many PRAM algorithms to reduce their asymptotic running time. Paul, Vishkin, and Wagener (PVW) used the approach in a parallel implementat...
Guy E. Blelloch, Margaret Reid-Miller
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
14 years 1 months ago
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
APCSAC
2000
IEEE
13 years 9 months ago
Micro-Threading: A New Approach to Future RISC
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
Chris R. Jesshope, Bing Luo
TVLSI
2008
115views more  TVLSI 2008»
13 years 4 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
CN
2007
90views more  CN 2007»
13 years 4 months ago
A scalable solution for engineering streaming traffic in the future Internet
As traffic on the Internet continues to grow exponentially, there is a real need to solve scalability and traffic engineering simultaneously — specifically, without using over-p...
Mario Baldi, Guido Marchetto, Yoram Ofek