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» Polymorphic On-Chip Networks
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DAC
2001
ACM
14 years 6 months ago
Route Packets, Not Wires: On-Chip Interconnection Networks
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
William J. Dally, Brian Towles
DATE
2008
IEEE
134views Hardware» more  DATE 2008»
13 years 12 months ago
Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence
This paper presents a novel architecture for on-chip neural network training using particle swarm optimization (PSO). PSO is an evolutionary optimization algorithm with a growing ...
Amin Farmahini Farahani, Seid Mehdi Fakhraie, Saee...
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
13 years 11 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
IEEEPACT
2009
IEEE
14 years 4 days ago
Oblivious Routing in On-Chip Bandwidth-Adaptive Networks
—Oblivious routing can be implemented on simple router hardware, but network performance suffers when routes become congested. Adaptive routing attempts to avoid hot spots by re-...
Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel...