Sciweavers

60 search results - page 2 / 12
» Post-Silicon Debug Using Programmable Logic Cores
Sort
View
ISCAS
2005
IEEE
99views Hardware» more  ISCAS 2005»
13 years 11 months ago
Concentrator access networks for programmable logic cores on SoCs
- The inclusion of programmable logic cores in modern SoCs motivates the need for an access network to make full use of this resource. The programmable nature of these cores remove...
Bradley R. Quinton, Steven J. E. Wilton
SIGSOFT
2009
ACM
14 years 6 months ago
DebugAdvisor: a recommender system for debugging
In large software development projects, when a programmer is assigned a bug to fix, she typically spends a lot of time searching (in an ad-hoc manner) for instances from the past ...
B. Ashok, Joseph M. Joy, Hongkang Liang, Sriram K....
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
13 years 10 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
ASP
2005
Springer
13 years 11 months ago
Debugging Logic Programs under the Answer Set Semantics
This paper discusses the background, algorithms and implementation techniques to support programmers in ‘debugging’ logic programs under the answer set semantics. We first inv...
Martin Brain, Marina De Vos
GPCE
2007
Springer
14 years 2 hour ago
Debugging macros
Over the past two decades, Scheme macros have evolved into a powerful API for the compiler front-end. Like Lisp macros, their predecessors, Scheme macros expand source programs in...
Ryan Culpepper, Matthias Felleisen