14 search results - page 1 / 3 » Power Aware Dividers in FPGA |
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
This paper surveys different implementations of dividers on FPGA technology. A special attention is paid on ATP (area-time-power) trade-offs between restoring, non-restoring, and S...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
GLOBECOM
2008
IEEE
13 years 5 months ago
2008
IEEE
Optimal network provisioning is the process of equipping the network with the devices and resources needed to support all traffic demands while minimizing the network cost. Optical...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
In this paper, the EX-VPR tool, which used for architecture level exploration, is presented. This tool belongs to an integrated framework (MEANDER) for mapping applications into a...