2 search results - page 1 / 1 » Power Reduction in Large Fan-in CMOS Gates in Logic Arrays U... |
GLVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
FPGA
2003
ACM
13 years 10 months ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...