16 search results - page 1 / 4 » Power analysis and low-power scheduling techniques for embed... |
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
ISVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
Many network security applications require large virus signature sets to be maintained, retrieved, and compared against the network streams. Software applications frequently fail ...
ICPPW
2007
IEEE
13 years 11 months ago
2007
IEEE
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
ASPDAC
1995
ACM
13 years 8 months ago
1995
ACM
A new approach for power analysis of microprocessorshas recently been proposed [1]. The idea is to look at the power consumption in a microprocessor from the point of view of the ...
HPCA
1996
IEEE
13 years 9 months ago
1996
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...