33 search results - page 3 / 7 » Power calculation and modeling in deep submicron |
PATMOS
2000
Springer
13 years 9 months ago
2000
Springer
Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...
ISLPED
1995
ACM
13 years 9 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
VTS
2002
IEEE
13 years 10 months ago
2002
IEEE
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulations experiments are design...
GLVLSI
1999
IEEE
13 years 9 months ago
1999
IEEE
The Elmore delay is the metric of choice for performancedriven design applications due to its simple, explicit form and ease with which sensitivity information can be calculated. ...
PATMOS
2007
Springer
13 years 11 months ago
2007
Springer
The deep submicron semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions should go ...