59 search results - page 1 / 12 » Power characterization of digital filters implemented on FPG... |
ISCAS
2002
IEEE
13 years 9 months ago
2002
IEEE
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— In this paper, we design and implement an improved hardware-based evolutionary digital filter (EDF) version 2. The EDF is an adaptive digital filter which is controlled by ad...
EH
2003
IEEE
13 years 10 months ago
2003
IEEE
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) ...
FPL
2009
Springer
13 years 9 months ago
2009
Springer
Field-programmable gate arrays are well-suited to DSP and digital communications applications. SRAM-based FPGAs, however, are susceptible to radiation-induced single-event upsets ...
AHS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...