7 search results - page 1 / 2 » Power-Aware Adaptive Issue Queue and Register File |
HIPC
2003
Springer
13 years 10 months ago
2003
Springer
In this paper, we present a novel technique to reduce dynamic and static power dissipation in the issue queue. The proposed scheme is based on delaying the dispatch of instructions...
HPCA
1996
IEEE
13 years 9 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
CF
2007
ACM
13 years 9 months ago
2007
ACM
Out-of-order execution significantly increases the performance of superscalar processors. The out-of-order execution mechanism is, however, energy-inefficient, which inhibits scal...
SBACPAD
2005
IEEE
13 years 10 months ago
2005
IEEE
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
Energy efficiency in microarchitectures has become a necessity. Significant dynamic energy savings can be realized for adaptive storage structures such as caches, issue queues, ...