10 search results - page 1 / 2 » Power-Aware Scheduling for Parallel Security Processors with... |
LCPC
2004
Springer
13 years 10 months ago
2004
Springer
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
ICPP
2002
IEEE
13 years 10 months ago
2002
IEEE
Power aware computing has become popular recently and many techniques have been proposed to manage the energy consumption for traditional real-time applications. We have previousl...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
GLOBECOM
2007
IEEE
13 years 11 months ago
2007
IEEE
—The growth of the Internet in the last years has been pushed by increasing requirements in terms of capacity, security and reliability. Moreover, improvements in multimedia appl...
HPCA
1995
IEEE
13 years 8 months ago
1995
IEEE
The throughput of a multiple-pipelined processor suffers due to lack of sufficient instructions to make multiple pipelines busy and due to delays associated with pipeline depende...