6 search results - page 1 / 2 » Power-optimal encoding for a DRAM address bus |
ISQED
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper we introduce a new low power address bus encoding technique, and the resulting code, named ALBORZ. The ALBORZ code is constructed based on transition signaling the l...
TVLSI
2002
13 years 4 months ago
2002
This paper presents an irredundant encoding technique to minimize the switching activity on a multiplexed Dynamic RAM (DRAM) address bus. The DRAM switching activity can be classif...
TVLSI
1998
13 years 4 months ago
1998
— This paper presents a solution to the problem of reducing the power dissipated by a digital system containing an intellectual proprietary core processor which repeatedly execut...
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
- This paper presents encoding techniques to optimize the switching activity on a multiplexed DRAM address bus. The DRAM switching activity can be classified either as external (be...