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MICRO
1998
IEEE
111views Hardware» more  MICRO 1998»
13 years 9 months ago
Precise Register Allocation for Irregular Architectures
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
Timothy Kong, Kent D. Wilken
CGO
2005
IEEE
13 years 10 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein
CC
2010
Springer
179views System Software» more  CC 2010»
13 years 11 months ago
Validating Register Allocation and Spilling
Abstract. Following the translation validation approach to highassurance compilation, we describe a new algorithm for validating a posteriori the results of a run of register alloc...
Silvain Rideau, Xavier Leroy
DAC
2009
ACM
14 years 5 months ago
WCET-aware register allocation based on graph coloring
Current compilers lack precise timing models guiding their built-in optimizations. Hence, compilers apply ad-hoc heuristics during optimization to improve code quality. One of the...
Heiko Falk
VLSISP
2008
159views more  VLSISP 2008»
13 years 4 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...