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HPCA
1996
IEEE
13 years 9 months ago
Predictive Sequential Associative Cache
In this paper, we propose a cache design that provides the same miss rate as a two-way set associative cache, but with a access time closer to a direct-mapped cache. As with other...
Brad Calder, Dirk Grunwald, Joel S. Emer
IEEEPACT
2003
IEEE
13 years 10 months ago
Miss Rate Prediction across All Program Inputs
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behav...
Yutao Zhong, Steve Dropsho, Chen Ding
HIPEAC
2007
Springer
13 years 11 months ago
Applying Decay to Reduce Dynamic Power in Set-Associative Caches
Abstract. In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open...
Georgios Keramidas, Polychronis Xekalakis, Stefano...
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
13 years 10 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 1 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu