This paper discusses an approach for solving combinatorial problems by combining software and dynamically reconfigurable hardware (configware). The suggested technique avoids inst...
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
Most operating systems enforce process isolation through hardware protection mechanisms such as memory segmentation, page mapping, and differentiated user and kernel instructions....
The partitioning of image processing algorithms with a novel hardware/software co-designframework (CoDe-X) is presented in this paper, where a new Xputer-architecture (parallel Ma...
This paper presents a comparison between two technologies for reconfigurable circuits that are FPGA'se the FPAA's. The comparison is based on a case study of the area of...
Roberto Selow, Heitor S. Lopes, Carlos R. Erig Lim...