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» Projection Penalties: Dimension Reduction without Loss
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ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 8 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
VLDB
2000
ACM
229views Database» more  VLDB 2000»
13 years 9 months ago
Local Dimensionality Reduction: A New Approach to Indexing High Dimensional Spaces
Many emerging application domains require database systems to support efficient access over highly multidimensional datasets. The current state-of-the-art technique to indexing hi...
Kaushik Chakrabarti, Sharad Mehrotra
DELTA
2008
IEEE
14 years 13 days ago
Improved Policies for Drowsy Caches in Embedded Processors
In the design of embedded systems, especially batterypowered systems, it is important to reduce energy consumption. Cache are now used not only in general-purpose processors but a...
Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroak...
VLSI
2005
Springer
13 years 11 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
IJON
2008
109views more  IJON 2008»
13 years 6 months ago
Unsupervised learning neural network with convex constraint: Structure and algorithm
This paper proposed a kind of unsupervised learning neural network model, which has special structure and can realize an evaluation and classification of many groups by the compres...
Hengqing Tong, Tianzhen Liu, Qiaoling Tong