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FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
13 years 10 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas
FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
13 years 6 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 6 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
DAC
2004
ACM
13 years 8 months ago
An SoC design methodology using FPGAs and embedded microprocessors
In System on Chip (SoC) design, growing design complexity has esigners to start designs at higher abstraction levels. This paper proposes an SoC design methodology that makes full...
Nobuyuki Ohba, Kohji Takano
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
14 years 1 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...