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» Quantifying Error in Dynamic Power Estimation of CMOS Circui...
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ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
13 years 2 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
ISLPED
1995
ACM
129views Hardware» more  ISLPED 1995»
13 years 8 months ago
CMOS dynamic power estimation based on collapsible current source transistor modeling
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Pet...
ISQED
2007
IEEE
179views Hardware» more  ISQED 2007»
13 years 11 months ago
Cross Layer Error Exploitation for Aggressive Voltage Scaling
This paper shows that by co-designing circuits and systems, considerable power savings are possible if the inherent data redundancy of candidate systems such as wireless is used t...
Amin Khajeh Djahromi, Ahmed M. Eltawil, Fadi J. Ku...
ISLPED
1996
ACM
110views Hardware» more  ISLPED 1996»
13 years 9 months ago
Statistical estimation of average power dissipation in CMOS VLSI circuits using nonparametric techniques
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang