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» Quasi-Resonant Interconnects: A Low Power Design Methodology
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ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
13 years 11 months ago
Quasi-Resonant Interconnects: A Low Power Design Methodology
— Design and analysis guidelines for resonant interconnect networks are presented in this paper. The methodology focuses on developing an accurate analytic distributed model of t...
Jonathan Rosenfeld, Eby G. Friedman
ISCAS
2005
IEEE
115views Hardware» more  ISCAS 2005»
13 years 10 months ago
Low power repeaters driving RLC interconnects with delay and bandwidth constraints
— Interconnect plays an increasingly important role in deep submicrometer VLSI technologies. Multiple design criteria are considered in interconnect design, such as delay, power,...
Guoqing Chen, Eby G. Friedman
ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
14 years 1 months ago
Interconnect-aware high-level synthesis for low power
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
Lin Zhong, Niraj K. Jha
ISLPED
1998
ACM
102views Hardware» more  ISLPED 1998»
13 years 8 months ago
Low power methodology and design techniques for processor design
J. Patrick Brennan, Alvar Dean, Stephan Kenyon, Se...
DAC
1997
ACM
13 years 8 months ago
Tools and Methodologies for Low Power Design
-- Designing for low power has become increasingly important in a wide variety of applications, including wireless telephony, mobile computing, high performance computing, and high...
Jerry Frenkil